Read-only memory (ROM) semiconductor integrated circuits (IC) are widely used as memory storage devices for digital electronic equipment, in particular, microprocessor-based computer systems, to store predetermined programs. In a conventional semiconductor ROM device, the channel region of a memory cell is selectively implanted with ions to adjust the threshold voltage thereof depending on whether the programmed memory cell is turned on or turned off to represent a logic "1" or a logic "0" in binary, respectively.
Semiconductor ROMs generally store their data information in arrays of memory cells, wherein each memory cell is a single transistor. The data bits held by the memory cell transistors are permanently stored in the physical or electrical properties of the individual memory cell transistors.
Referring to FIG. 1, semiconductor ROMs are generally formed by intersecting a plurality of bitlines, 8a, 8b, 8c and 8d, which have been diffused into a semiconductor substrate 7 as shown in FIG. 2(a) with a plurality of wordlines, 9a, 9b and 9c, lying over the substrate 7. The wordlines 9 are physically separated from the bitlines 8 and the substrate 7 by a thin gate oxide layer 6 as shown in FIG. 2(a) such that an array of memory cell MOSFETs (metal-oxide-semiconductor field effect transistors) is formed. In the array, the wordlines 9 serve as gates for the memory cell transistors while the bitlines 8 serve as source and drain diffusion regions.
In the case of mask ROM, the coding of the data bits onto the memory cell transistors is generally performed by implanting ions into the channel regions of the appropriate memory cell transistors, thereby adjusting their threshold voltages. This step of coding the data into the ROM array structure through ion implantation is performed using a code mask which permits the implantation of ions into only certain regions of the semiconductor. The usage of a code mask leads to the name of mask ROM.
Conventionally, a ROM for storing data "0" is achieved by ROM code implantation. Then, conventional digital circuitry in the ROM employs sense amplifiers to sense the content of an addressed memory cell for "reading". The sensed result with respect to each memory cell within the ROM is identified as one of two possible electrical potential states. In other words, the memory content of a ROM memory cell as read is either a logic "1" or a logic "0".
The trend in the semiconductor industry has been to increase the number of memory cells to increase the storage capacity of a semiconductor integrated circuit chip, while reducing the size of the semiconductor device itself. Enlarged memory capacity and reduced memory semiconductor die size represent increased functionality and reduced cost. Great effort has been expended in the art of semiconductor chip manufacture to reduce the dimensions of semiconductor devices in order to squeeze more memory cells into the same semiconductor die area.
However, the ROM code implantation has become a critical process step when the cell size keeps scaling.
In order to ensure a high threshold voltage V.sub.t for a "0" state ROM code cell 10, the ROM code mask 11 has to be larger than the cell size as shown in FIG. 1 because misalignment of ROM code mask will lead to a low V.sub.t region and wrong data storage at cell 10. The results of ROM code implantation are shown in FIG. 2(a) and FIG. 2(b). However, considering the misalignment of ROM code mask 11 and lateral diffusion of ROM code implantation, the neighboring cells 12 and 13 will be affected as shown in FIG. 2(c). FIG. 2 (b) shows an aligned ROM code implant 14 which is used to form the cell into a state "0". FIG. 2 (c) shows a misaligned ROM code implant 15 which leads to the decrease of cell current at the neighboring cells 12 and 13, especially at data 1 cell, where the threshold voltage is different from that of data 0 cell, thereby causing a yield loss. Besides, the ROM code implantation greatly lowers the junction breakdown voltage which sets another limitation in operating condition.